1. Field of the Invention
The present invention relates to a liquid crystal display device and method, and more particularly, to a liquid crystal display including a coplanar line structure and related method.
2. Discussion of the Related Art
A group of switching devices in which active elements such as thin film transistors (hereinafter called "TFT") are integrated is used for driving and controlling each pixel in an active matrix liquid crystal display device. As shown in FIG. 1, in a conventional liquid crystal display with a TFT array, pixel electrodes 12 that are almost rectangular are closely arranged in rows and columns on a transparent substrate 11. A plurality of gate lines 13 are respectively formed closely along rows of the pixel electrodes 12 and a plurality of source lines 14 are respectively formed closely along the columns of the pixel electrodes 12. FIG. 2 is a plan view showing a part of the liquid crystal display elements of the liquid crystal display with a TFT array. FIG. 3 shows an intersection where gate and source lines cross each other perpendicularly in FIG. 2.
Referring to FIG. 2, first, an insulating film covering the gate lines 13 is formed on a transparent substrate 11 and a plurality of source lines 14 which perpendicularly cross the gate lines 13 are formed in parallel on the insulating film. Also, a semiconductor layer is formed around each intersection of the gate lines 13 and source lines 14 after the insulating film is formed on the gate lines 13 and the gate electrodes. Drain and source electrodes are formed facing each other on the semiconductor layer. Thus, non-linear active element TFTs are formed. In the TFT structure, the drain electrodes are formed in such a manner as to be electrically connected with transparent pixel electrodes on the insulating film. The semiconductor layer and the drain and source electrodes are covered with an insulating protective film. These TFTs basically include the gate electrodes, the insulating films, the semiconductor layers, and the drain and source electrodes, which are formed by repeating processes of making films and photoetching.
However, since the gate lines 13 and the source lines 14 are on different levels, as shown in FIG. 3 in which 25 is an anodized film and 26 is an insulating film, the process of forming the source lines 14 can only be done after the process of forming the gates lines 13. As a result, when the source lines 14 cross over the step-coverage of the gates lines 13, poor quality in tapers of the metal layers forming the gate lines and failures resulting from the stress of metal layers forming the source lines result in imperfect contacts of the source lines, disconnection in cross-over sections, and disconnection in the insulating film edges (hereinafter called "open-lines"). Moreover, parasitic capacitance in the step-coverage results in signal delays on the circuit of the gates lines.